About the role
AI summarisedThis internship involves building a production-style QA platform as a Streamlit application to support semiconductor design workflows. The role focuses on integrating DRC tools, tracking QA metrics, managing rule stability, and implementing a lightweight chatbot for engineer support. Interns will work on full-stack app development including frontend navigation, backend data modeling, and internal tool integration.
FablessOnsiteChip Design
Key Responsibilities
- Build a multipage Streamlit app with navigation, session state, and role-based views
- Create pages for launching QA runs, monitoring progress, and reviewing results
- Develop KPI dashboards for cycle time, pass/fail rates, iteration counts, and stability trends
- Integrate with a DRC tool (e.g., KLayout or Calibre) to execute checks from the app
- Parse and normalize DRC reports, linking violations to rule IDs, run IDs, and timestamps
- Implement a rule registry with metadata including ID, description, deck reference, owners, severity, and status
- Track rule updates, QA history, and compute stability signals such as no-change windows and regression flags
- Design schemas for runs, results, rules, and artifacts using PostgreSQL or SQLite
- Persist logs, reports, and attachments with traceable metadata and audit trails
- Add a simple chatbot to answer FAQs using lightweight retrieval over internal documentation
Requirements
- Bachelor's Degree in Computer Science, Computer Engineering, or Electrical and Electronics Engineering
- Master's Degree in Computer Science, Computer Engineering, or Electrical and Electronics Engineering
- PhD in Computer Science, Computer Engineering, or Electrical and Electronics Engineering