About the role
AI summarisedThe Chip Physical Verification Data Engineer is responsible for building and maintaining data pipelines that support IC design processes, particularly physical verification. This role involves extracting, transforming, and loading data from EDA tools, design databases, and workflow systems to enable analysis, machine learning, and dashboarding. The engineer ensures data integrity, governance, and security while collaborating with stakeholders to meet data quality and availability needs.
FablessOnsiteChip Design
Key Responsibilities
- Responsible for extracting, transforming and loading (ETL) of data generated in various stages of IC Design process (e.g. Physical verification stage)
- Integrate data from EDA tools (Calibre, DRV, ICV, Fusion Compiler, Innovus), design databases (netlist and layout), and workflow systems
- Develop and optimize data workflows to facilitate data collection for analysis, machine learning and dashboard
- Ensure data integrity, governance, and security best practices throughout all data engineering processes
- Monitor job performance and implement automation and alerting for data operations
- Collaborate with data analysts and business stakeholders to gather requirements and ensure data quality and availability
Requirements
- Bachelor/Masters Degree in Electrical/Electronics Engineering or Computer Science
- Proficient in EDA tools (Calibre, DRV, Laker, ICV) and familiar with IC Design workflow for design data extraction.
- Proficient in MongoDB, Python or Perl for data processing.
- Strong data analysis, data verification and problem-solving abilities.