About the role
AI summarisedLead a high-performing analog design team within Marvell’s Central Engineering AMS-IP group, focusing on developing advanced circuits for next-generation high-speed wireline and optical products.
FablessOnsite
Key Responsibilities
- Provide direct leadership to analog mixed-signal design engineers focused on high-speed wireline communication technologies.
- Own design execution, ensuring high-quality deliverables and adherence to project schedules.
- Collaborate with system and architecture teams to identify optimal circuit solutions based on cost, performance, and risk trade-offs.
- Oversee the design of various analog IPs, including SerDes, Die-to-Die interfaces, and foundational analog building blocks.
- Work closely with cross-functional teams (RTL, DSP, firmware, verification, physical design) to drive successful project execution.
- Support post-silicon testing and validation of analog mixed-signal circuits to ensure performance and reliability.
- Conduct rigorous design reviews to maintain quality standards and ensure compliance with project requirements.
- Champion continuous improvement in execution efficiency and design quality across the team.
Requirements
- MSEE with 15+ years of industry experience.
- At least 5 years of experience managing a team of 10 or more engineers.
- 10+ years of proven expertise in advanced analog circuit or IP development.
- 8 years of hands-on experience with NRZ and PAM4 SerDes technologies.
- Strong communication and interpersonal skills, with demonstrated ability to collaborate across multiple functional teams.