About the role
AI summarisedJoin Marvell's central engineering team to design highly sophisticated CMOS transceiver/SERDES and essential analog IPs. This role involves architectural investigation, circuit implementation, and design verification to bring cutting-edge analog designs from concept to production.
FablessOnsite
Key Responsibilities
- Design sophisticated CMOS transceiver/SERDES and essential analog IPs, including PLLs, DLLs, ADCs, regulators, amplifiers, TX, RX, and CDRs.
- Conduct architectural investigations and circuit implementation to meet stringent key performance targets.
- Perform design verification using industry-standard tools such as SPICE, Spectre, and MATLAB.
- Collaborate closely with layout, verification, and application teams throughout the design cycle.
- Manage the delivery of analog IP from initial concept through to successful production.
Requirements
- Master’s degree and/or PhD in Computer Science, Electrical Engineering, or a related field.
- More than 5 years of relevant professional experience.
- Strong fundamentals in analog circuit design.
- Proven experience designing blocks such as PLLs, Data Converters, Oscillators, and high-speed SerDes components (CTLE, FFE, DFE, CDRs).
- Proficiency in analog design and verification tools including Virtuoso, Spectre, ADE, and post-extraction tools.
- Excellent problem-solving and analytical abilities.
- Experience with lab chip bring-up and debugging is required.