Marvell

Senior Staff Engineer, Analog Layout

Marvell
Fabless SemiconductorSingaporeOnsitePosted 4 weeks ago

About the role

AI summarised

Join Marvell and contribute to the essential building blocks of data infrastructure by owning chip/macro layouts in a dynamic, cross-functional team environment.

FablessOnsite

Key Responsibilities

  • Own chip/macro layout and the overall project schedule, coordinating with design leads and layout managers.
  • Collaborate effectively with diverse groups including layout, design, backend, frontend, ESD, packaging, and CAD.
  • Represent layout within the project cross-functional team, potentially leading remote design teams.
  • Implement project-specific guidelines and ensure adherence across team members.
  • Contribute to the team through tool testing, script development, flow documentation, and training.
  • Stay current with technology and tool developments to introduce new ideas to the team.

Requirements

  • Bachelor’s or Master's degree in Computer Science, Electrical Engineering, or a related field.
  • At least 15+ years of related professional experience.
  • Deep understanding of layout methodology from initial chip planning through tape-out.
  • In-depth knowledge of parasitic optimization in layout.
  • High proficiency in interpreting CALIBRE DRC, ERC, and LVS reports.
  • High-level proficiency/knowledge of Synopsys or CADENCE layout entry tools.
  • Strong technical background and analytical problem-solving skills.
  • Fluent in English.