About the role
AI summarisedSenior Silicon Design Engineer focused on Signal and Power Integrity (SIPI) simulations and analysis for AECG characterization and demo boards, covering chip, package, and PCB levels.
FablessOnsiteEngineering
Key Responsibilities
- Perform Signal Integrity and Power Integrity simulations at feasibility, pre-layout, and post-layout phases of AECG characterization board and demo board design.
- Coordinate with HW design team, layout team, NPI and manufacturing vendors to resolve SI/PI related issues.
- Execute end-to-end channel simulations for multi gigabit serial lines including 56Gbps and 112Gbps.
- Conduct PI analysis simulation of HBM, DDR, LPDDR4, DDR5, LPDDR5 and other memory buses.
- Characterize various interfaces in the product and verify simulations against physical measurements.
- Establish design and layout guidelines and implement checklists for various stages of PCB development.
- Collaborate with architecture, package design, and PCB design teams for future PCB technology development.
- Update the SIPI design and analysis flow and automate simulation processes.
Requirements
- MS in Electrical Engineering with 3+ years of experience or a PhD in Electrical Engineering.
- Experience with PCB, Package and IC level power delivery networks (PDN).
- Experience in silicon packaging and PCB design for signal and power integrity.
- Knowledge of high-speed digital signaling interfaces such as PCIE, GDDR6 and HDMI.
- Expertise in electrical modeling EDA and AMS tools such as ADS, Power SI, HFSS, SIwave, and Hspice.
- Deep understanding of electromagnetic theory and circuit analysis.
- Proficiency in programming with Python, C++, and Matlab.
- Strong analytical and problem-solving skills with attention to detail.