About the role
AI summarisedThe Senior Engineer in Technology Integration for Wafer-level Packaging leads the end-to-end development, qualification, and manufacturing transfer of new processes and materials. This role involves driving technology innovation, ensuring robust manufacturability, and coordinating cross-functionally to achieve yield, reliability, and ramp-up goals. The engineer acts as a subject matter expert, applying technical skills to solve moderately complex manufacturing issues while supporting technology transfer from pilot to high-volume production.
FablessOnsiteHardware Engineering
Key Responsibilities
- Define process requirements, success criteria, design-of-experiments (DOE), and characterization plans
- Drive root-cause analyses, failure mechanism studies, and improvement loops to achieve performance, yield, and reliability targets
- Translate product requirements into process specifications and control strategies
- Co-own the technology transfer roadmap with project leader - from pilot line to high-volume manufacturing
- Adapt to shifting priorities and resources while ensuring deadlines are met
- Supervise and provide technical guidance to onsite process transfer activities, including documentation (PFMEA, etc), training, process replication, and equipment matching
- Work with each process cluster to establish critical process windows, statistical control limits, and ramp-readiness criteria
- Coordinate and report ramp performance tracking (yield, scrap, cycle time, tool capability) and drive closure of gaps
- Initiate and participate actively in discussions on formulation of process technology innovation and release process improvement
- Collaborate and develop effective working relationships with technology partners to accomplish project/task goals within committed schedule
- Develop new and impactful ideas, materials, solutions, and/or procedures for product fabrication process and technology meeting business goals and launch schedule with competitive manufacturing costs
Requirements
- Bachelor’s or Master’s degree in Engineering (Materials, Chemical, Semiconductor, etc.)
- 3+ years of experience in process integration engineering, technology development, or a high volume manufacturing fab
- Broad exposure to wafer-level packaging technology and processes
- Demonstrated success leading cross disciplinary technology integration projects
- Strong skills in DOE, SPC, data analytics, FMEA, and troubleshooting
- Excellent communication, technical documentation, and stakeholder management skills
- Resourceful with critical thinking in problem solving
- Project and priority management skills
- Experience in semiconductor, MEMS, packaging, or high-volume manufacturing
- Familiarity with yield engineering, reliability mechanisms, and failure analysis as well as use of statistical tools, DOE, PFCP/PFMEA, etc.
- Experience with scale-up from R&D → Pilot → HVM
- Knowledge of Lean, Six Sigma, or structured problem-solving (8D, DMAIC)
- Able to multi-task, set priorities and meet critical deadlines
- Maintain open communication
- Able to attend training program overseas at sister’s fab for up to 1 year