AMD

Snr. Product Development Engineer - Debug /Failure Analysis

AMD
Fabless SemiconductorSingapore, SingaporeOnsitePosted 4 months ago

About the role

AI summarised

The Senior Product Development Engineer in Debug/Failure Analysis at AMD is responsible for analyzing customer returns, performing electrical failure analysis on ATE and SLT, duplicating failures at platform and board levels, and driving cross-functional collaboration to isolate faults and improve product quality. The role involves providing technical direction, writing conclusive reports, owning product technical queries, and supporting DPPM improvement initiatives. Candidates should have strong analytical skills, experience in silicon debug or FA, knowledge of CPU/GPU architectures, scripting skills, and familiarity with industry standards like PCIe and USB, with a Bachelor’s or Master’s in Electrical/Electronic or Computer Engineering preferred.

FablessOnsiteEngineering

Key Responsibilities

  • Perform analysis & report writing on customer returns electrical FA, include analysis on Automated Test Equipment (ATE) and System Level Test (SLT), duplicate customer reported failure on Platform level and perform board level debug
  • Customer returns debug covering pre & post Mass Production, field return including Excursion/Critical issue, also cover debug for Defect Part Per Million (DPPM) improvement
  • Drive cross-functional collaboration by proactively engaging with Device Analysis and Product Engineering teams to lead fault isolation and root-cause investigations
  • Identify and define test coverage enhancements that strengthen product quality, prevent customer-facing failures, and support long-term reliability improvements
  • Provide technical direction in diagnosing complex issues, influencing validation strategies, and ensuring findings translate into actionable quality improvements across functions
  • Provide conclusive and convincing results and align with Program/PLQ/Customer Interfacing team on final analysis report writing for customer communication

Requirements

  • Strong in silicon debug or Failure Analysis knowledge either on electronics system level or Integrated Chip
  • Candidate should be analytical and detail oriented, strongly interested in debugging complex system, self-starter, and fast learner
  • Experience working in root causes digital or analog failure or SCAN/MBIST/High Speed Loopback failure
  • GPU, CPU or x86 architecture knowledge is much preferred
  • Java, Python, Perl coding or Linux Shell scripting skills
  • Window and Linux proficiency
  • JTAG knowledge is a plus
  • Knowledge in ATE test class/method experience with Advantest 93k platform is a plus
  • Experience in computing hardware, PC systems or Server platform projects or task is a plus
  • Knowledge or experience in PCB board or Customer Reference Board platform (schematics, layout, hardware configuration/setup, platform validation) is a plus
  • Knowledge in industry standards like PCIE, USB, or high bandwidth memory is a strong plus
  • Experience in AI or Machine Learning project or task is a plus
  • Bachelor’s or Master’s degree in Electrical/Electronic Engineering or Computer Engineering