About the role
AI summarisedThe PDE Director/DMTS role provides technical leadership in developing and maintaining chip package interaction technology roadmaps and strategies for advanced silicon technology node transitions in packaging. This involves close collaboration with multifunctional engineering teams across fab process integration, product and package design, and global quality to ensure successful launches of future memory products.
IDMOnsiteAssembly & Test
Key Responsibilities
- Developing and communicating silicon technology roadmaps while collaborating with multiple fab sites on advanced memory technology transitions
- Collaborating with engineering teams (fab process integration, assembly design, product design) to establish CPI risk mitigation strategies
- Aligning priorities, timelines, and resource needs with management and stakeholders to ensure seamless integration of silicon technology and test vehicles with design & process requirements
Requirements
- 15+ years of proven experience in related fields
- Expertise in chip-package-interaction failure mechanisms and risk assessments
- Strong understanding of semiconductor processing and devices
- Proven ability to form collaborations with internal and external customers
- Ability to work on multiple projects and resolve cross-disciplinary/cross-organizational issues
- Strong relationship building and matrix management skills
- Excellent communication skills, capable of conveying complex technical concepts to diverse audiences