About the role
AI summarisedMicron’s NAND Process Development team in Singapore is seeking an experienced Principal Engineer to join the Advanced Node Technology Development organization. This role drives next-generation NAND technology deployment through process innovation, margin improvement, and close collaboration with global manufacturing and development groups, focusing on advancing CMP process capability for high-volume production.
IDMOnsiteSTPG
Key Responsibilities
- Own and lead Chemical Mechanical Planarization (CMP) process characterization and advanced process development for 3D NAND and future technology nodes.
- Collaborate with global teams (Singapore, US, Taiwan, IDF) and vendors to develop and integrate CMP processes aligned with next-generation NAND technology requirements.
- Transfer developed CMP processes to high-volume manufacturing (Fab10N) and drive continuous improvements in yield, performance, and manufacturability.
- Develop strategies to expand process margins through consumables development, equipment evaluation, and testing of novel applications.
- Design, execute, and analyze experiments to validate process robustness, manufacturability, and technology scaling readiness.
- Serve as a technical subject-matter expert contributing to critical technology decisions and roadmap direction for advanced NAND nodes.
- Identify process simplification opportunities to improve cost, productivity, and cycle time.
Requirements
- PhD with ≥5 years, or Master’s degree with ≥7 years, or Bachelor’s degree with ≥10 years of relevant experience in Electrical Engineering, Materials Science, Chemical Engineering, Physics, or a related field.
- Demonstrated expertise in leading edge CMP polishing equipment such as EBARA WS or AMAT.
- Deep technical expertise in CMP Process Development, including mastery of CMP equipment operation, polishing mechanisms (dielectric and metal), slurries, pads, conditioning, and process optimization for advanced nodes.
- Strong understanding of integration and structural impacts related to film deposition and CMP within NAND/Memory processes.
- Proven ability to perform root-cause analysis using data analytics tools (e.g., Y3) and interpret complex experimental data.
- Working knowledge of Design of Experiments (DoE) for systematic process development.
- Ability to lead and mentor junior CMP engineers, driving technical rigor and standards.