About the role
AI summarisedAs a Senior High Bandwidth Memory Test Engineer at Micron, you will develop, debug, and maintain code enabling the parallel testing of advanced memory devices. This role involves close interaction with global R&D teams, contributing to the design and debugging of test hardware while developing efficient production test flows through test algorithm optimization.
IDMOnsiteAssembly & Test
Key Responsibilities
- Define Test Plans for new tests and test algorithms for HBM, covering software/hardware requirements, defect coverage, characterization, trending, process flow, and test times.
- Develop test programs for products using primarily Python and C coding on automated test equipment, followed by release to manufacturing.
- Independently debug and identify root causes of test issues, providing solutions across internal and external groups.
- Provide meaningful statistical data analysis, analytics, and justification on program validation for release to ensure high program quality.
- Evaluate and verify yields/quality with global teams to ensure products meet all datasheet specifications.
- Support internal and external groups on experiments designed to improve yield or capacity by resolving impacting test issues.
- Drive Innovation and Improvement with the goal of reducing the Cost of Test for Micron in the Test Department.
- Serve as a Liaison and Coach, communicating effectively with internal and external customers regarding probe and test processes.
Requirements
- Bachelor’s Degree in Electrical or Electronics Engineering
- Minimum 5 years of experience in test solution engineering within the semiconductor industry.
- Experienced with digital systems and digital logic specifically for DRAM or HBM.
- Strong logical thinking and problem-solving abilities.
- Proficiency in test program development using Python and C coding.
- Ability to adhere to strict release quality standards for all test programs and scripts.