Qualcomm

Digital System Level Test (SLT) Engineer, Senior

Qualcomm
Fabless SemiconductorSingapore, Central Singapore, SingaporeOnsitePosted 5 days ago

About the role

AI summarised

Senior Digital System Level Test Engineer responsible for characterizing performance and validating hardware-software interactions for Snapdragon products from silicon bring-up to high-volume manufacturing.

FablessOnsiteHardware Engineering

Key Responsibilities

  • Participate in IC design reviews and hardware testing from early-stage silicon bring-up to post-silicon validation efforts
  • Collaborate with software teams to evaluate integrated system performance and characterize hardware/software interactions
  • Evaluate device performance across various operating conditions including voltage, process, and thermal parameters
  • Work with production test teams to develop effective production screens for system level issues
  • Analyze specifications to develop test plans, test cases, and execute system-level validation
  • Support production testing environments including Gauge R&R, shop-floor support, and OSAT handling

Requirements

  • Bachelor's or Master’s degree in Electrical/Electronics Engineering, Computer Science Engineering, or related field
  • 4-8 years of hands-on experience in System, SW, bench test, or HW-SW interaction testing
  • Experience characterizing Processors, PCIE, Graphics, Memory, Thermal, and Power performance of ASICs
  • Proven experience developing and executing test cases for Android-based devices
  • Hands-on debug and triage experience using Android debugging tools and JTAG Lauterbach/Trace32
  • Strong working knowledge of Android Architecture, Android Boot process, Kernel, Core BSP, and Android Performance
  • Familiarity with hardware platforms featuring peripherals like PCIE, DDR, UFS, USB, Display, and Camera
  • Experience with high-speed interface characterization such as HDMI, WiFi, PCIE, SATA, or HSUSB