About the role
AI summarisedSenior Yield Enhancement Engineer in a semiconductor foundry, responsible for driving defect reduction and yield improvement activities. The role involves supervising associate engineers, operating advanced inspection and analysis tools (FIB/SEM/EDX), performing defect characterization, and collaborating with module engineers to troubleshoot inline defects.
FoundryFull-timeIntegration
Key Responsibilities
- Supervise YE Associate Engineers and wafer tech operators to ensure smooth 24/7 inline shift operation
- Train and certify YE Associate Engineers on recipe creation and defect source knowledge
- Maintain and enhance internal SOP/OCAP and involve in internal/external audit
- Operate FIB/SEM/EDX for inline failure analysis
- Operate and create recipes in Brightfield, Darkfield and other defect inspection tools
- Perform partition analysis on defect source and detailed reports on issues
- Build and develop defect source land tool's defect source fingerprinting
- Track inline defect performance by layer/process tool/chamber on weekly basis
- Perform killer ratio analysis
- Perform defect characterization by process tools
- Continuous improvement activities on defect reductions with Modules / vendors / equipment team
- Liaise with process engineers in different modules to troubleshoot for inline defects and defect reduction activities
Requirements
- Masters or Bachelor Degree in Electrical / Electronics / Chemical / Material Science Engineering
- 2-8 years of relevant fab work experience in high volume manufacturing of electronics components in an MNC or front end wafer fab industry preferred
- Responsible and accountable for complying with and implementing environmental, health, safety and security (EHSS) system, policies, procedures and guidelines that are applicable to your scope of work, thereby maintaining a healthy and safe workplace
- Excellent interpersonal and communication skills with good leadership capability
- Team player