About the role
AI summarisedJoin AMD's growing PLL team as a Staff Design Verification Engineer. You will be a key contributor in a leading team dedicated to driving and improving AMD's ability to deliver the highest quality, industry-leading technologies to the market by tackling complex verification and digital design challenges.
FablessOnsiteEngineering
Key Responsibilities
- Analyze complex verification and digital design problems and propose verification/micro-architecture solutions.
- Drive and develop ASIC verification flows and scripts.
- Work with the RTL Design team to ensure functional correctness and coverage.
- Support silicon bring-up and diagnostics.
- Support Post-silicon debug, root cause bug identification, and solution/workaround provision.
Requirements
- Excellent analytical and critical thinking skills with strong attention to detail.
- Must be an initiative-taker, capable of driving tasks independently and efficiently to completion.
- Strong and effective communication skills.
- Enthusiastic team-first mentality.
- Ability to provide mentorship and guidance to junior engineers.
- Bachelors or Masters Degree in Computer Engineering/Electrical Engineering.