About the role
AI summarisedJoin AMD's Test Engineering team, responsible for enabling the availability of FPGAs, SoCs & ACAPs to customers. This role drives cost, quality, and time-to-market by developing robust test programs, leading yield improvement initiatives, and collaborating closely with cross-functional teams.
FablessOnsiteEngineering
Key Responsibilities
- Develop ATE test programs for FPGA & SoC products, including constructing/enhancing test methods and integrating timings/levels into the test flow.
- Collaborate with test pattern developers during New Product Introduction (NPI) by generating, debugging, and implementing new test patterns.
- Work with product/yield engineers to implement new test requirements for yield and quality improvements, including productivity enhancement and cost reduction activities.
- Implement and manage efuse operations, including reading fuse maps, developing secure burning procedures, read-back verification, trim, and CRC flows.
- Analyze large test datasets to drive yield improvement, failure analysis, and continuous optimization, including building automated dashboards and reports.
- Manage and execute complex test cost reduction projects and New Product bring up activities.
- Lead and mentor junior engineers on project deliverables.
Requirements
- Bachelor’s or master’s degree in Electronics Engineering (Specialization in Electronics or Computer Engineering preferred).
- Proven track record of developing and releasing new test programs to production.
- Strong analytical and problem-solving abilities with excellent cross-functional team collaboration skills.
- Fluent in both oral and written English.
- Proficiency in ATE test program development for FPGA & SoC products.
- Ability to understand basic symmetric and asymmetric cryptographic functions (e.g., AES, SHA, RSA/ECC).