About the role
AI summarisedAMD is seeking a talented and self-driven Digital Design Engineer to join the SerDes Technology group. This role involves contributing to the development of SerDes/Transceiver designs and solutions across the entire FPGA/ASIC digital design flow, from architectural specification through post-silicon validation.
FablessOnsiteEngineering
Key Responsibilities
- Design and develop digital logic blocks using leading-edge technology nodes.
- Implement and verify Design For Testability (DFT).
- Develop test benches and perform functional verification of designed digital logic blocks.
- Conduct post-silicon validation, testing, and debugging of block functionality on prototype silicon.
- Collaborate with system architects, project managers, and design/verification teams to create design specifications, verification plans, and validation test plans.
Requirements
- Bachelor or Masters Degree in Electronic Engineering.
- Hands-on experience in RTL development (Verilog/SystemVerilog) for complex digital blocks or subsystems.
- Exposure to the front-end digital design flow, including RTL coding, functional verification, lint/CDC checks, logic synthesis, and timing analysis.
- Experience contributing to ASIC or FPGA tapeouts (block or subsystem level).
- Strong problem-solving skills and willingness to learn new domains.
- Excellent communication and collaboration skills with cross-functional teams.