Qualcomm

Senior Staff R&D Design Technology Integration Engineer (WLP, Bump, Die Sort)

Qualcomm
Fabless SemiconductorSingapore, Central Singapore, SingaporeOnsitePosted 3 months ago

About the role

AI summarised

Join the Business Unit Engineering organization supporting RF Front End Modules for Cellular and Wireless Data markets. This senior technical role requires a specialist to provide leadership in developing sustainable technology platforms, bridging materials science, device physics, and manufacturing processes.

FablessOnsiteHardware Engineering

Key Responsibilities

  • Support the development of advanced technologies for Si/GaAs backend interconnect, passivation, RDL, bump, and flip chip packaging (CPI).
  • Monitor and improve existing processes to enhance yield, quality, throughput, efficiency, and product reliability.
  • Formulate industry-leading design guidelines by incorporating lessons from past failures and manufacturing constraints.
  • Create, conduct, and analyze Design of Experiments (DOE) related to bump/die sort quality, yield, and CPI impact.
  • Interface with foundries and OSATs for direct project management of critical programs.
  • Lead technology integration into products, performing technical risk assessment and ensuring yield/reliability metrics align with product release schedules.
  • Team cross-functionally with Design, Device process development, Packaging, FEA, and global NPI teams to support technology readiness for new products.
  • Resolve quality, yield, and manufacturing problems using structured problem-solving methods.

Requirements

  • Master’s Degree or equivalent in Mechanical, Materials, or Chemical Engineering (PhD Preferred).
  • 10+ years of experience desired in electronics packaging within related environments, especially RF module industry.
  • At least 5 years of direct experience in process engineering, product integration, or quality management at tier 1 foundries or assembly sub-contractors.
  • Solid technical understanding of full range of Semiconductor packaging materials, interactions, processes, failure mechanisms, and analytical techniques.
  • Understanding of package/product qualification, reliability methods, and failure analysis is required.
  • Familiarity with process details including SPC, Control plans, OCAPs, FMEAs, PCN, and CARs.
  • Excellent communication skills.
  • Willingness to travel internationally, typically once per quarter.