About the role
AI summarisedThe Technical Lead is responsible for the test solution for next-generation AMD Products, serving as the Test Engineering team's Technical Leader and subject matter expert. This role drives test and characterization plans, first silicon bring-up, silicon debug, and optimization of yield, performance distributions, and test costs for cutting-edge AMD products.
FablessOnsiteEngineering
Key Responsibilities
- Define and drive pre-silicon test and characterization strategies for complex SoC products.
- Establish DFT and pattern requirements, collaborating with Design and Verification teams to ensure test readiness prior to first silicon.
- Lead first silicon bring-up, silicon debug, and characterization execution across PVT corners.
- Analyze yield, performance distributions, and device failures; lead root cause analysis and drive corrective actions across global teams.
- Perform circuit sensitivity analysis, interpret findings, and guide deep dive investigations to resolution.
- Drive innovation in SoC test, debug, DFT, and test methodology, translating ideas into production-ready solutions.
- Own test content optimization to meet product quality and cost targets, driving yield, test time, and margin improvements.
Requirements
- Bachelor/Master in Electrical/Electronic Engineering
- Proven technical leadership across at least one full SoC product lifecycle (pre-silicon to production).
- Deep expertise in DFT and ATE test methodologies (ATPG Scan, MBIST, Functional, High-Speed IO testing).
- Strong ability to act as a technical decision-maker and mentor within the test organization.
- Strong communication skills to engage deeply with global, cross-functional engineering teams.
- Ability to lead by influence and drive test schedules and deliverables.