About the role
AI summarisedJoin the high-end test engineering team providing cutting-edge test solutions for Data Center Graphics (DCG) New Product Introduction (NPI). This role involves exciting product development for next-generation processors used in high-performance computing, data centers, enterprise servers, and AI clusters. You will drive ATE test solutions to meet critical NPI milestones regarding test time, yield, cost, and quality.
FablessOnsiteEngineering
Key Responsibilities
- Drive test solution/coverage development and optimization to meet business milestones, cost targets, and quality standards.
- Develop, debug, test, and characterize test patterns and flows/methods.
- Engage in Pre-Silicon activities including design review, test solution scoping, planning, and validation.
- Lead Post-Silicon bring up of test patterns, driving optimizations for mass production enablement.
- Execute and analyze characterization data while debugging new silicon designs and process technologies.
- Optimize test coverage and flows to improve quality, yield, reduce cost, and decrease test time.
- Conduct engineering evaluations and analysis to drive closure on production issues.
- Solve complex, novel, and non-recurring engineering problems, initiating significant changes to existing processes/methods.
- Influence technical decisions that have a significant impact on the final product.
Requirements
- Proficient understanding of DFT (Design-For-Test) architecture for SOC (System-On-Chip) products.
- Strong experience in test development and Silicon characterization/debug using industry-standard ATE platforms.
- Proven ability in data analysis related to semiconductor testing.
- BS/MS in Electrical Engineering, Computer Engineering, or comparable disciplines.
- Strong technical, analytical, leadership, and problem-solving skills.
- Demonstrated ability to work independently and resourcefully.
- Proficiency in Windows and Linux operating systems.