About the role

AI summarised

Staff Design Verification Engineer at AMD, a semiconductor company, responsible for verifying complex PLL and high-speed interface designs. The role involves developing verification architecture, RTL and firmware validation, and supporting silicon bring-up and debug. Requires strong analytical skills, experience in design verification, and knowledge of ASIC CAD tools.

FablessFull-time{'name': 'Engineering'}

Key Responsibilities

Analyze complex verification and digital design problems and propose verification / micro-architecture solutions
Develop RTL and Firmware validation
Drive/develop ASIC verification flows and scripts
Create Verification architecture
Work with the RTL Design team to ensure functional correctness and coverage
Support silicon bring-up and diagnostics
Support Post-silicon debug, root cause bug, provide solution or workaround

Requirements

Excellent analytical and critical thinking skills along with attention to details
Must be an initiative-taker, able to drive tasks independently and efficiently to completion
Strong/effective communication skills
Enthusiastic team-first mentality
Ability to provide mentorship and guidance to junior engineers
Proven experience in design verification from specification to successful silicon
Experience in PLL, high-speed interfaces such as DDR, PCIe and high-speed SERDES
Experience in designs with multiple power domains
Experience in designs with multiple clock domains
Experience in behavior modeling for Analog Circuits
Experience in industry-standard ASIC CAD tools for verification, simulation, synthesis, STA, CDC, UPF, power estimation, etc.
Progressive experience in RTL Design
Bachelors or Masters Degree in Computer Engineering/Electrical Engineering