About the role

AI summarised

Marvell is seeking a Senior Staff Analog Design Engineer - ESD to design input matching networks and ESD protection schemes for high-speed analog and mixed-signal IP in advanced process technologies such as 3nm FinFET and 2nm GAA. The role involves circuit and layout design review, simulation, collaboration with IP designers to mitigate ESD risks while preserving analog performance, and ensuring compliance with ESD standards. Candidates should have a strong background in analog circuit design, semiconductor device physics, and proficiency with EDA tools and advanced process design rules.

FablessOnsite

Key Responsibilities

Architect and implement ESD protection schemes for high-speed analog and mixed-signal IP
Review circuit and layout designs, perform simulations, and ensure compliance with ESD standards
Collaborate with IP designers to mitigate ESD risks while preserving analog performance
Work on leading-edge nodes including 3nm FinFET and 2nm GAA technologies
Design input matching network in conjunction with ESD protection in advanced process technology
Optimize input network to achieve most optimum bandwidth

Requirements

Bachelor’s degree in Electrical Engineering or related field with 8+ years of experience
Master’s or PhD with 5+ years of experience preferred
Strong understanding in analog circuit design
High Speed Serdes' input matching network expertise
Semiconductor device physics knowledge
Experience with analog blocks (regulators, amplifiers, filters, transceivers)
Good proficiency in ESD/Latchup standards and protection techniques
Proficiency with EDA tools (e.g., Cadence Virtuoso, Spectre, SPICE)
Knowledge of design rules for advanced process nodes
Eligibility to access export-controlled information under U.S. export control laws (EAR)