About the role

AI summarised

The Staff Analog Layout Engineer at Marvell will work with global teams to create and verify analog integrated circuit layouts using Cadence Virtuoso. Responsibilities include collaborating with designers through iterative refinement, participating in project lifecycle activities from floorplan to delivery, and providing technical mentorship. The role requires a strong foundation in electrical engineering, experience with analog circuit design across multiple process nodes, and excellent communication skills for global teamwork.

FablessOnsite

Key Responsibilities

Run simulations and verifications using Cadence Virtuoso
Collaborate closely with designers to refine and debug layouts iteratively
Participate in routine meetings as a technical mentor and layout team member
Present specific issues or solutions encountered during development
Ensure collaborative information sharing with global teams
Contribute to project lifecycle from floorplan to delivery and support
Assume ownership of tasks from cells to functional blocks, macros, and full interfaces
Provide status updates to team and present to global teams across time zones

Requirements

Fundamental understanding of electrical concepts
Degree in Electrical Engineering (graduate or undergraduate)
Proficiency in using CAD tools for implementation layers and microelectronic layers
Track record of delivering high-speed or precision analog circuits
Experience in multiple process nodes
Ownership through full development cycle: floorplan, layout, verification, delivery, and support
Ability to assume responsibility and ownership from cells to chips
Excellent communication skills for status updates and presentations
Ability to share information with personnel at various levels