About the role

AI summarised

Join AMD's Test Engineering team, a cost, quality, and time-to-market driven group responsible for enabling the availability of FPGAs, SoCs & ACAPs to customers. This role involves close collaboration with Test Pattern Developers and Product Engineers on new product releases and production yield/quality improvement activities.

FablessOnsiteEngineering

Key Responsibilities

Develop ATE test programs for FPGA & SoCs products, including constructing/enhancing test methods and integrating timings/levels into the test flow.
Collaborate with test pattern developers during New Product Introduction (NPI) by generating, debugging, and implementing new test patterns.
Work with product/yield engineers to implement new test requirements for yield and quality improvements.
Drive productivity improvement and cost reduction activities, such as test time reduction and multi-site development & implementation.
Implement and manage efuse operations, including reading fuse maps, developing secure burning procedures, read-back verification, trim, and CRC flows.
Analyze large test datasets to drive yield improvement, failure analysis, and continuous optimization; build automated dashboards and reports.

Requirements

Bachelor’s or master’s degree in Electronics Engineering (Specialization in Electronics or Computer Engineering preferred).
Strong analytical and problem-solving skills.
Effective communication and presentation skills in oral and written English.
Ability to work effectively in cross-functional teams.
Understanding of basic symmetric and asymmetric cryptographic functions (e.g., AES, SHA, RSA/ECC).