Foundation IP Memory Verification Engineer

Key Responsibilities

• Contribute towards Memory Design Validation of all types of custom memory macros and memory compilers
• Perform functional verification, root cause design discrepancies, and help resolve them
• Perform signal integrity analysis, identify design weaknesses, and propose possible solutions to address them
• Perform transistor level simulations to check for any Power Up or Lock up issues and help resolve them
• Perform EM/IR analysis/simulations and evaluate impact on timing and internal margins
• Perform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve them
• Perform various QA and validation checks to ensure accurate timing and power models
• Develop scripts to automate verification flow and data analysis
• Support silicon debugs and correlation to spice models
• Collaborate with key memory designers to co-develop and improve the memory characterization and validation flow
• Coordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan