About the role
AI summarisedJoin our Central Engineering Group as a passionate memory design engineer in an elite team responsible for developing cutting-edge memory compilers and custom macros at the bleeding edge of process technology.
FablessOnsite
Key Responsibilities
- Analyze different memory architectures and highlight tradeoffs
- Design and build memory or circuit blocks at the gate or transistor level
- Simulate and analyze the circuit design using transistor level simulators
- Extract layout and perform post-layout simulations and verification
- Floorplan physical implementation and leafcell layout integration to build the physical macro
- Integrate characterization flow to extract timing and power information
- Develop scripts to automate characterization flow, simulations, and verification
- Specify and verify various behavioral and physical memory models
- Document the design specifications, behavioral description, and timing diagrams
- Specify silicon test plan and correlate silicon to simulation data
Requirements
- BS in Electrical Engineering
- 5+ years of related experience
- Knowledge in development of memory compilers or custom digital circuits (SRAMs, Register-files, Multi-ports, ROM, etc.)
- Good understanding of transistor level circuit behavior and device physics
- Good understanding of signal integrity, EM/IR, and reliability analysis
- Understanding of memory behavioral and physical models
- Proficiency in running simulators and writing automation scripts