About the role
AI summarisedJoin our Central Engineering Group as a Foundation IP Memory Verification Engineer and contribute to the development of foundation IP for AI products, including memory compilers, logic cells, and custom macros at the bleeding edge of process technology.
FablessOnsite
Key Responsibilities
- Contribute to Memory Design Validation of all types of custom memory macros and memory compilers
- Perform functional verification, root cause analysis of design discrepancies, and assist in resolution
- Conduct signal integrity analysis to identify design weaknesses and propose solutions
- Perform transistor level simulations to check for Power Up or Lock up issues and resolve them
- Execute EM/IR analysis/simulations and evaluate impact on timing and internal margins
- Perform transistor level simulations to validate timing and internal margins, identify characterization holes, and resolve issues
- Perform various QA and validation checks to ensure accurate timing and power models
- Develop scripts to automate verification flow and data analysis
- Support silicon debugs and correlation to spice models
- Collaborate with memory designers to co-develop and improve characterization and validation flow
Requirements
- BS in Electrical or Computer Engineering
- 2 years of relevant experience
- Proficiency in running simulators
- Ability to write automation scripts
- Good understanding of transistor level circuit behavior and device physics
- Strong problem-solving skills