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Micron Technology

Senior/ Staff STPG NAND Product Development Engineer – Test Chip Vehicle

Micron Technology
Integrated Device ManufacturingSingapore, SingaporeOnsitePosted 3 days ago
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About the role

AI summarised

This senior-level role focuses on technical leadership for NAND flash memory Test Chip Vehicles (TCV). The engineer will oversee the entire learning loop from pre-silicon simulation and regression strategy to silicon bring-up, debug, and characterization to drive design and methodology improvements for next-generation products.

IDMOnsiteSTPG

Key Responsibilities

  • Own pre-silicon validation strategy for TCV, partnering with Design, Process, and TD to define what must be proven in simulation versus silicon.
  • Develop, maintain, and execute robust simulation and regression frameworks (functional, parametric, stress, and corner) aligned to TCV objectives.
  • Define coverage expectations and exit criteria for pre-silicon regressions, identifying gaps and latent risks early.
  • Analyze simulation results to surface architecture, device, and margin sensitivities, driving design updates and tape-out readiness decisions.
  • Provide technical ownership for TCV bring-up from first silicon through full characterization readiness.
  • Define probe enablement, trims, operating conditions, and debug strategies to accelerate stable and informative silicon access.
  • Lead execution of electrical characterization plans validating array, periphery and experimental features against design and process intent.
  • Architect TCV specific test modes, patterns, and flows to maximize learning efficiency and data quality.
  • Partner with Test Solutions Engineering (TSE) to influence probe architecture and infrastructure supporting TCV for protocol evolution.
  • Spearhead AI adoption to perform advanced data analytics across large simulation and silicon datasets.

Requirements

  • Bachelor’s or post-graduate degree in Electrical/ Electronics/ Computer Engineering or related field.
  • Minimum 5 years of relevant industrial experience.
  • Strong fundamentals in CMOS/ MOSFET device physics, memory circuits, and semiconductor devices.
  • Demonstrated experience owning pre-silicon simulation/regression and post-silicon test/ validation for complex designs.
  • Strong capability in data analysis and scripting (Python, JMP, or equivalent) applied to large datasets.
  • Proven ability to drive ambiguous technical problems to closure with minimal supervision.
  • Deep experience with NAND Flash architectures, array/periphery interactions, and test chips is preferred.
  • Working knowledge of DFT, probe test infrastructure, and failure analysis.
  • Experience with firmware-assisted test modes and experimental silicon features.
  • Exposure to automation, ML/AI, or advanced analytics applied to simulation and silicon learning loops.
  • Candidates may be considered for higher job grades if they exceed 10 years of relevant experience.