About the role
AI summarisedThe engineer defines physical design rules for current and future NVM technologies, collaborates with process integration and design teams, supports design rule checking, and creates algorithms for mask data generation.
IDMOnsiteSTPG
Key Responsibilities
- Define physical design rules for current and future Non-Volatile Memory (NVM) technologies from conception to full production ramp.
- Interact with process integration team to keep all technology developments up to date, to ensure DR's are accurate.
- Interact with design teams to evaluate the feasibility of different layout and architecture options (i.e., design rule and process limitations).
- Interact across multi-disciplinary teams to understand product and test structure failures and their interaction with layout and mask generated data.
- Support design rule checking (DRC) of both base and mask layers and interface with physical verification team.
- Define algorithms for generation of mask data from drawn base layer data.
- Involve projects across multi-disciplinary teams focusing on layout and mask generation issues.
Requirements
- will result in immediate disqualification.