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Broadcom

R&D Engineer Adv Tech Dev (PKE) / Sr. Staff

Broadcom
Fabless SemiconductorSingapore-YishunOnsitePosted 3 weeks ago
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About the role

AI summarised

Join our team to drive the selection and development of optimum package solutions for advanced silicon node products (5nm, 3nm, 2nm and beyond). This role involves close collaboration with IC design, system design, and thermal engineering teams to push the boundaries of cutting-edge packaging technology from concept through high volume production.

FablessOnsite

Key Responsibilities

  • Select optimum package solutions balancing cost, performance, manufacturability, and reliability for advanced silicon nodes (5nm, 3nm, 2nm+).
  • Collaborate with IC design, system design, and thermal teams to design custom packages meeting stringent CPI, SI/PI, and thermal requirements.
  • Research, develop, and productize new materials (e.g., TIM, build-up film, underfill) supporting advanced node silicon.
  • Serve as a technical specialist defining assembly BOMs, processes, and troubleshooting packaging issues in new advanced technologies.
  • Implement, fine-tune, and productize newly developed technologies into High Volume Manufacturing (HVM).
  • Resolve quality issues in close partnership with QA and customers.

Requirements

  • BS/MS/PhD in STEM, Material Science, Electrical, or Mechanical Engineering.
  • 8+ years experience with BS, 6+ years with MS, or 3+ years with PhD.
  • Deep understanding of Signal Integrity (SI) and Power Integrity (PI) concepts (e.g., characteristic impedance, s-parameters, power plane optimization).
  • Strong authority on Cadence APD for custom substrate design.
  • Hands-on expertise with advanced assembly processes (flipchip, MCM packages, 2.5D) for advanced nodes (5nm, 3/2nm+).
  • Good understanding of materials related to Chip Packaging Interaction (CPI) and wafer BEOL processes.
  • Knowledge of advanced substrate manufacturing/processes (e.g., SAP/mSAP, PSPI w/ Cu RDL).
  • In-depth knowledge of failure analysis techniques on advanced node silicon products (5nm, 3/2nm+).
  • Strong project management, communication, and leadership skills.
  • Must have knowledge of GD&T and be able to read/comprehend mechanical drawings.