About the role
AI summarisedJoin our epitaxy team within the Advanced Process Modules (APM) at the National Semiconductor Translation and Innovation Centre (NSTIC) – Power Electronics. You will be responsible for cutting-edge SiC epitaxy process development crucial for next-generation power devices.
ResearchOnsiteInstitute of Microelectronics
Key Responsibilities
- Design and implement innovative SiC epitaxial processes on an industrial hot-wall CVD system to achieve high uniformity and minimal extended defect density on 6- and 8-inch SiC substrates.
- Perform comprehensive metrology and characterization of SiC epilayers, including dopant/thickness uniformity, surface roughness, crystal quality, stress, and carrier lifetime.
- Conduct optical and photoluminescence inspections to analyze extended defects in SiC epilayers (e.g., micropipes, carrots, stacking faults).
- Design experiments aimed at minimizing point and extended defect densities to enhance SiC power device performance.
- Develop advanced epitaxy processes for cutting-edge devices, including SiC selective epitaxy and SiC trench-filling epitaxy.
- Prepare technical presentations, papers for conferences/journals, and draft technical disclosures/IP.
- Collaborate with IME's NSTIC – Power team to solve key technical challenges in the SiC power electronics industry.
- Contribute ideas for new funding proposals.
Requirements
- Bachelor's or Master's degree in Electrical/Electronic Engineering, Materials Science, Physics, Chemistry, or a related field.
- 2 to 3 years of experience in semiconductor CVD process, preferably epitaxy development or manufacturing (Si, SiC, GaN, or other semiconductors).
- Strong knowledge of semiconductor processes (e.g., lithography, etching) and characterization techniques (e.g., SEM, TEM, XRD).
- Excellent communication, collaboration, and self-motivation skills.
- Avid technical reader, critical thinker, and strong team player.