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Micron Technology

Front End Central Product Integration (FE cPIE) MTS (FE)

Micron Technology
Integrated Device ManufacturingSingapore, SingaporeOnsitePosted 3 weeks ago
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About the role

AI summarised

The Front End Central Product Integration (FE cPIE) MTS role leads end-to-end process integration strategies for critical semiconductor modules, focusing on structural uniformity and yield optimization across front-end processes. The position requires driving physics-based solutions, developing model-driven root cause analysis frameworks, and owning product integration programs through node transitions. Responsibilities include global technical alignment, standardization of best practices, and leading process improvements to enhance yield, quality, and development productivity. Candidates must have strong analytical skills, deep semiconductor process knowledge, and experience in troubleshooting complex integration issues.

IDMOnsiteFront End

Key Responsibilities

  • Lead process integration structural uniformity and cross-loop integration for critical modules (e.g., capacitance loop), owning end-to-end integration strategies to resolve yield, quality, and reliability gaps
  • Drive physics- and process-based integration solutions through close collaboration with cross-module process owners, PI subject-matter experts, and key suppliers to optimise integration structures and achieve BIC yield and quality targets
  • Develop and apply model-based root cause analysis frameworks (transport, reaction kinetics, pattern density, and geometry-dependent effects) to diagnose structural non-uniformity
  • Define, implement, and continuously strengthen critical inline monitoring and defence lines (CD, film loss, mass delta, defectivity, edge/periphery metrics) to ensure robust control of structural uniformity
  • Proactively drive node-over-node 'shift-left' integration, including early implementation of uniformity, bevel, and backside best-known-methods (BKMs) during development phases to accelerate whole-wafer (centre-to-edge) yield and quality ramp
  • Drive worldwide technical alignment and execution excellence by leading global projects, standardising and leveraging network BKMs, and scaling proven solutions across sites
  • Identify efficiency and performance gaps, and lead business process creation, optimisation, and re-engineering to improve benchmark performance, cycle time, and development productivity

Requirements

  • Bachelor's/Master's/PhD in EE, Materials Engineering, Materials Science, Physics and Chemical Engineering (or equivalent experience)
  • More than 7 years of relevant industry experience in semiconductor process-related roles
  • Good logical thinking and knowledge in semiconductor fabrication process flows, interaction of different processes and how changes affect yield, device performance and reliability
  • Understanding of DRAM and NAND operation and structure to decipher parametric, probe and qual data from both front-end and backend assembly processes
  • Good model-based problem solving, together with data-driven decision making, and presentation skills
  • Proven ability to troubleshoot and solve structure and device-related issues, and address root cause
  • Good organisational capabilities and ability to work effectively, with flexibility to assume added responsibilities
  • Ability to travel to Micron sites as necessary for face-to-face collaboration
  • Strong interpersonal