Micron Technology

Principal Engineer, (NAND Cell Film Process)

Micron Technology
Integrated Device ManufacturingSingapore, SingaporeOnsitePosted 3 months ago

About the role

AI summarised

The Principal Engineer for NAND Cell Film Process leads the development and integration of advanced thin film processes for next-generation NAND memory technology. This role involves defining technical strategy, leading cross-functional teams, resolving complex technical challenges, and driving technology transfer from R&D to high-volume manufacturing. The position requires deep expertise in thin film deposition, device physics, and process characterization to support innovation and manufacturability.

IDMOnsiteSTPG

Key Responsibilities

  • Define and implement the technical strategy for cell film process development, ensuring alignment with both business and technology objectives
  • Lead multi-functional teams in the development, integration, and scaling of thin film processes specifically tailored for advanced NAND devices
  • Resolve complex technical challenges that have significant business implications, including root cause analysis and mitigation of process/device failures
  • Mentor senior engineers and influence the technical direction throughout the organization, fostering a culture of technical excellence and innovation
  • Represent the function in technical forums and participate in strategic collaborations, including industry consortia, technical conferences, and joint development projects
  • Deliver solutions that enable and maintain a competitive leadership position in advanced memory technology, including benchmarking against industry standards
  • Drive technology transfer and ramp-up activities, ensuring seamless transition from R&D to high-volume manufacturing
  • Identify and evaluate emerging trends, risks, and opportunities in cell film technology, providing recommendations for future investments and critical initiatives
  • Lead cost reduction, yield improvement, and reliability enhancement programs through innovative process and material utilization

Requirements

  • In-depth knowledge of process-device interactions, challenges associated with device scaling, and the principles of reliability engineering for next-generation memory nodes
  • Proven track record of developing and implementing novel chemistries, materials, and hardware solutions, such as chamber design, plasma source optimization, and gas delivery systems
  • Strong foundation in device physics, including Metal-Oxide